// Copyright 2017 The Crashpad Authors. All rights reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef CRASHPAD_UTIL_LINUX_THREAD_INFO_H_
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#define CRASHPAD_UTIL_LINUX_THREAD_INFO_H_
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#include <stdint.h>
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#include <sys/user.h>
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#include <type_traits>
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#include "build/build_config.h"
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#include "util/linux/address_types.h"
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#include "util/numeric/int128.h"
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#if defined(OS_ANDROID)
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#include <android/api-level.h>
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#endif
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namespace crashpad {
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//! \brief The set of general purpose registers for an architecture family.
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union ThreadContext {
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ThreadContext();
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~ThreadContext();
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//! \brief The general purpose registers used by the 32-bit variant of the
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//! architecture.
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struct t32_t {
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#if defined(ARCH_CPU_X86_FAMILY)
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// Reflects user_regs_struct in sys/user.h.
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uint32_t ebx;
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uint32_t ecx;
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uint32_t edx;
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uint32_t esi;
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uint32_t edi;
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uint32_t ebp;
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uint32_t eax;
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uint32_t xds;
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uint32_t xes;
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uint32_t xfs;
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uint32_t xgs;
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uint32_t orig_eax;
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uint32_t eip;
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uint32_t xcs;
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uint32_t eflags;
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uint32_t esp;
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uint32_t xss;
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#elif defined(ARCH_CPU_ARM_FAMILY)
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// Reflects user_regs in sys/user.h.
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uint32_t regs[11];
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uint32_t fp;
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uint32_t ip;
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uint32_t sp;
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uint32_t lr;
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uint32_t pc;
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uint32_t cpsr;
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uint32_t orig_r0;
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#elif defined(ARCH_CPU_MIPS_FAMILY)
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// Reflects output format of static int gpr32_get(), defined in
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// arch/mips/kernel/ptrace.c in kernel source
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uint32_t padding0_[6];
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uint32_t regs[32];
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uint32_t lo;
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uint32_t hi;
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uint32_t cp0_epc;
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uint32_t cp0_badvaddr;
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uint32_t cp0_status;
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uint32_t cp0_cause;
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uint32_t padding1_;
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#else
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#error Port.
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#endif // ARCH_CPU_X86_FAMILY
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} t32;
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//! \brief The general purpose registers used by the 64-bit variant of the
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//! architecture.
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struct t64_t {
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#if defined(ARCH_CPU_X86_FAMILY)
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// Reflects user_regs_struct in sys/user.h.
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uint64_t r15;
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uint64_t r14;
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uint64_t r13;
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uint64_t r12;
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uint64_t rbp;
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uint64_t rbx;
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uint64_t r11;
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uint64_t r10;
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uint64_t r9;
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uint64_t r8;
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uint64_t rax;
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uint64_t rcx;
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uint64_t rdx;
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uint64_t rsi;
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uint64_t rdi;
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uint64_t orig_rax;
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uint64_t rip;
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uint64_t cs;
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uint64_t eflags;
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uint64_t rsp;
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uint64_t ss;
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uint64_t fs_base;
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uint64_t gs_base;
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uint64_t ds;
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uint64_t es;
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uint64_t fs;
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uint64_t gs;
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#elif defined(ARCH_CPU_ARM_FAMILY)
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// Reflects user_regs_struct in sys/user.h.
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uint64_t regs[31];
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uint64_t sp;
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uint64_t pc;
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uint64_t pstate;
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#elif defined(ARCH_CPU_MIPS_FAMILY)
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// Reflects output format of static int gpr64_get(), defined in
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// arch/mips/kernel/ptrace.c in kernel source
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uint64_t regs[32];
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uint64_t lo;
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uint64_t hi;
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uint64_t cp0_epc;
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uint64_t cp0_badvaddr;
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uint64_t cp0_status;
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uint64_t cp0_cause;
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#else
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#error Port.
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#endif // ARCH_CPU_X86_FAMILY
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} t64;
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#if defined(ARCH_CPU_X86_FAMILY) || defined(ARCH_CPU_ARM64)
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using NativeThreadContext = user_regs_struct;
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#elif defined(ARCH_CPU_ARMEL)
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using NativeThreadContext = user_regs;
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#elif defined(ARCH_CPU_MIPS_FAMILY)
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// No appropriate NativeThreadsContext type available for MIPS
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#else
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#error Port.
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#endif // ARCH_CPU_X86_FAMILY || ARCH_CPU_ARM64
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#if !defined(ARCH_CPU_MIPS_FAMILY)
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#if defined(ARCH_CPU_32_BITS)
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static_assert(sizeof(t32_t) == sizeof(NativeThreadContext), "Size mismatch");
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#else // ARCH_CPU_64_BITS
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static_assert(sizeof(t64_t) == sizeof(NativeThreadContext), "Size mismatch");
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#endif // ARCH_CPU_32_BITS
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#endif // !ARCH_CPU_MIPS_FAMILY
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};
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static_assert(std::is_standard_layout<ThreadContext>::value,
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"Not standard layout");
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//! \brief The floating point registers used for an architecture family.
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union FloatContext {
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FloatContext();
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~FloatContext();
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//! \brief The floating point registers used by the 32-bit variant of the
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//! architecture.
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struct f32_t {
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#if defined(ARCH_CPU_X86_FAMILY)
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// Reflects user_fpxregs_struct in sys/user.h
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struct fxsave {
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uint16_t cwd;
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uint16_t swd;
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uint16_t twd;
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uint16_t fop;
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uint32_t fip;
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uint32_t fcs;
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uint32_t foo;
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uint32_t fos;
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uint32_t mxcsr;
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uint32_t reserved;
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uint32_t st_space[32];
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uint32_t xmm_space[32];
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uint32_t padding[56];
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} fxsave;
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#elif defined(ARCH_CPU_ARM_FAMILY)
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// Reflects user_fpregs in sys/user.h.
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struct fpregs {
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struct fp_reg {
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uint32_t sign1 : 1;
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uint32_t unused : 15;
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uint32_t sign2 : 1;
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uint32_t exponent : 14;
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uint32_t j : 1;
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uint32_t mantissa1 : 31;
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uint32_t mantisss0 : 32;
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} fpregs[8];
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uint32_t fpsr : 32;
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uint32_t fpcr : 32;
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uint8_t type[8];
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uint32_t init_flag;
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} fpregs;
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// Reflects user_vfp in sys/user.h.
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struct vfp_t {
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uint64_t fpregs[32];
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uint32_t fpscr;
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} vfp;
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bool have_fpregs;
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bool have_vfp;
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#elif defined(ARCH_CPU_MIPS_FAMILY)
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// Reflects data format filled by ptrace_getfpregs() in
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// arch/mips/kernel/ptrace.c
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struct {
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float _fp_fregs;
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unsigned int _fp_pad;
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} fpregs[32];
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uint32_t fpcsr;
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uint32_t fpu_id;
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#else
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#error Port.
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#endif // ARCH_CPU_X86_FAMILY
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} f32;
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//! \brief The floating point registers used by the 64-bit variant of the
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//! architecture.
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struct f64_t {
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#if defined(ARCH_CPU_X86_FAMILY)
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// Refelects user_fpregs_struct in sys/user.h
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struct fxsave {
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uint16_t cwd;
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uint16_t swd;
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uint16_t ftw;
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uint16_t fop;
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uint64_t rip;
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uint64_t rdp;
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uint32_t mxcsr;
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uint32_t mxcr_mask;
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uint32_t st_space[32];
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uint32_t xmm_space[64];
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uint32_t padding[24];
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} fxsave;
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#elif defined(ARCH_CPU_ARM_FAMILY)
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uint128_struct vregs[32];
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uint32_t fpsr;
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uint32_t fpcr;
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uint8_t padding[8];
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#elif defined(ARCH_CPU_MIPS_FAMILY)
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// Reflects data format filled by ptrace_getfpregs() in
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// arch/mips/kernel/ptrace.c
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double fpregs[32];
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uint32_t fpcsr;
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uint32_t fpu_id;
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#else
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#error Port.
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#endif // ARCH_CPU_X86_FAMILY
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} f64;
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#if defined(ARCH_CPU_X86)
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// __ANDROID_API_N__ is a proxy for determining whether unified headers are in
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// use. It’s only defined by unified headers. Unified headers call this
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// structure user_fpxregs_struct regardless of API level.
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#if defined(OS_ANDROID) && __ANDROID_API__ <= 19 && !defined(__ANDROID_API_N__)
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using NativeFpxregs = user_fxsr_struct;
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#else
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using NativeFpxregs = user_fpxregs_struct;
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#endif // OS_ANDROID
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static_assert(sizeof(f32_t::fxsave) == sizeof(NativeFpxregs),
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"Size mismatch");
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#elif defined(ARCH_CPU_X86_64)
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static_assert(sizeof(f64_t::fxsave) == sizeof(user_fpregs_struct),
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"Size mismatch");
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#elif defined(ARCH_CPU_ARMEL)
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static_assert(sizeof(f32_t::fpregs) == sizeof(user_fpregs), "Size mismatch");
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#if !defined(__GLIBC__)
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static_assert(sizeof(f32_t::vfp) == sizeof(user_vfp), "Size mismatch");
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#endif
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#elif defined(ARCH_CPU_ARM64)
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static_assert(sizeof(f64) == sizeof(user_fpsimd_struct), "Size mismatch");
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#elif defined(ARCH_CPU_MIPS_FAMILY)
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// No appropriate floating point context native type for available MIPS.
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#else
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#error Port.
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#endif // ARCH_CPU_X86
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};
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static_assert(std::is_standard_layout<FloatContext>::value,
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"Not standard layout");
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//! \brief A collection of `ptrace`-able information about a thread.
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struct ThreadInfo {
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ThreadInfo();
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~ThreadInfo();
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//! \brief The general purpose registers for the thread.
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ThreadContext thread_context;
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//! \brief The floating point registers for the thread.
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FloatContext float_context;
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//! \brief The thread-local storage address for the thread.
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LinuxVMAddress thread_specific_data_address;
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};
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} // namespace crashpad
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#endif // CRASHPAD_UTIL_LINUX_THREAD_INFO_H_
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